{"id":4101,"date":"2025-03-27T14:57:02","date_gmt":"2025-03-27T13:57:02","guid":{"rendered":"https:\/\/micronanotech.polito.it\/?post_type=posizione-disponibil&p=4101"},"modified":"2025-03-27T14:57:02","modified_gmt":"2025-03-27T13:57:02","slug":"sputtering-deposition-and-characterisation-of-lead-free-alloys-micro-bumbs-for-flip-chip-technology","status":"publish","type":"posizione-disponibil","link":"https:\/\/micronanotech.polito.it\/it\/posizione-disponibil\/sputtering-deposition-and-characterisation-of-lead-free-alloys-micro-bumbs-for-flip-chip-technology\/","title":{"rendered":"Sputtering Deposition and Characterisation of Lead-Free Alloys micro-Bumbs for Flip-Chip Technology"},"content":{"rendered":"

This thesis proposal outlines a research plan focused on the development and characterization of lead-free alloy micro-bumps for flip-chip technology, utilizing sputtering deposition.<\/span> Sputtering, a vacuum deposition technique, offers precise control over alloy composition and microstructure, crucial for achieving reliable and robust micro-bumps. This research will investigate the deposition of promising lead-free alloys, such as Sn-Ag-Cu, Sn-Bi<\/span> or<\/span> Sn-In, onto silicon substrates with under-bump metallization. The study will encompass optimizing sputtering parameters to control film morphology, uniformity, and adhesion.<\/span><\/p>\n

\n

The goal is to establish a robust sputtering process for fabricating high-quality lead-free alloy micro-bumps, contributing to the advancement of sustainable and reliable flip-chip packaging. This research builds upon previous work demonstrating the feasibility of sputtering for micro-bump fabrication and the performance of various lead-free alloys<\/span>. <\/span>The findings will provide valuable insights into the relationship between sputtering parameters, alloy composition, and micro-bump performance, enabling the development of optimized lead-free interconnects for next-generation <\/span>Systems-in-Packages (<\/span>SiPs<\/span>) [1, 2].<\/span><\/p>\n

The work will be organised as follow: <\/span><\/p>\n

\u2022 <\/span>Literature review <\/span>on <\/span>solder bumps for flip-chip technology<\/span><\/div>\n
\u2022 <\/span>Process development and parameters estimation<\/span><\/div>\n
\u2022 <\/span>Results characterisation (<\/span>e.g. <\/span>shear test, SEM<\/span>, contact resistance)<\/span><\/div>\n
[1] Karim, S., Z., <\/span>Schetty<\/span>, R., <\/span>Lead-Free Bump Interconnections for Flip-Chip Applications<\/span>, 2000<\/span><\/div>\n
[2] Datta, M., <\/span>Manufacturing processes for fabrication of flip-chip micro-bumps used in microelectronic packaging: An overview<\/span>, 2020<\/span><\/div>\n
<\/div>\n
For more information please contact luciano.scaltrito@polito.it , valentina.bertana@polito.it<\/div>\n","protected":false},"template":"","format":"standard","type-of-position":[35],"class_list":["post-4101","posizione-disponibil","type-posizione-disponibil","status-publish","format-standard","hentry","type-of-position-thesis-proposals"],"acf":[],"_links":{"self":[{"href":"https:\/\/micronanotech.polito.it\/it\/wp-json\/wp\/v2\/posizione-disponibil\/4101","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/micronanotech.polito.it\/it\/wp-json\/wp\/v2\/posizione-disponibil"}],"about":[{"href":"https:\/\/micronanotech.polito.it\/it\/wp-json\/wp\/v2\/types\/posizione-disponibil"}],"wp:attachment":[{"href":"https:\/\/micronanotech.polito.it\/it\/wp-json\/wp\/v2\/media?parent=4101"}],"wp:term":[{"taxonomy":"type-of-position","embeddable":true,"href":"https:\/\/micronanotech.polito.it\/it\/wp-json\/wp\/v2\/type-of-position?post=4101"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}